IMEC tackles limits of CMOS

Last week at Semicon West (San Francisco, CA), the Belgian research center IMEC announced three new programs targeting the outer limits of current silicon processing. Of the three, perhaps the most ambitious is an "Advanced Device Implementation" program that seeks to scale CMOS technology down to 22 nm gate lengths. Conventional wisdom holds that CMOS transistors will no longer be commercially viable below 50 nm gate lengths, because short channel effects will outweigh performance benefits.

The IMEC research, a three-year project, will identify the most critical limitations of conventional CMOS and investigate potential improvements. Experiments will focus on front-end-of-line (FEOL) manufacturing issues, particularly gate stack materials such as metal gates and high dielectric constant (k) replacements for SiO₂. The program also supports development of simulation tools.

A second, complementary program will investigate alternatives to silicon for the post-CMOS era. Proposed device designs for sub-35 nm gate lengths include strained Si/SiGe layers, vertical transistors, and double- or triple-gate structures. The "Emerging Advanced Devices" (EMERALD) program will investigate CMOS compatibility and transition paths for these approaches, while attempting to determine their process complexity.

BiCMOS is already the process of choice for high frequency communications devices. As the RF communications market grows, manufacturers would like to realize some of the same economies of scale that Moore's Law has brought to the CMOS device market. IMEC's third new program will spend two years developing a fully integrated 0.18 micron BiCMOS process for applications using frequencies up to 5 GHz.

Milestones for the program include SiGeC heterojunction bipolar transistor (HBT) module development, BiCMOS process integration, and RF passive components. The first year will concentrate on design of a test chip for process development, process step and module development, and process assembly. The second year will focus on integration issues.

All three projects fall under the umbrella of IMEC's Industrial Affiliation Program (IIAP). IIAP research projects are collaborations between IMEC and a limited number of industrial partners, who gain early access to strategic technology.

IMEC tackles limits of CMOS

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