IMEC tackles low-k packaging, RF CMOS

So far, most research on copper/low-k interconnects has focused on the wafer process: protecting the transistors from copper diffusion, integrating the component parts of the metal structure, and so forth. Yet packaging of copper-based circuits also presents unique problems.

As IMEC fellow Karen Maex explained at the research institute's annual review meeting last week, copper bond pads are prone to oxidation. New wire bond materials may be needed, and new reliability concerns require attention. Low dielectric constant (k) materials are softer than SiO₂, introducing mechanical packagability issues. Moreover, all of this innovation is taking place in an era of increasing circuit pin counts and shrinking bond pitch.

Accordingly, IMEC announced a new industrial affiliation program focused on packaging of copper/low-k ICs. The program involves three different IMEC divisions: microsystems components, silicon process technology, and silicon technology and device integration. Initial goals include development of an improved chip passivation for low-k materials, optimization of an I/O redistribution layer for flip-chip bonding, and integration of passive components with the redistribution layer.

Also at last week's meeting, IMEC announced a program to develop CMOS devices for RF applications in the 5-25 GHz range. Using the institute's 100 nm CMOS process as a baseline, the RF CMOS program will develop and integrate building blocks such as oscillators, frequency multipliers, and a variety of other active and passive devices. Gilbert Declerck, president and CEO of IMEC, explained that BiCMOS is likely to remain the technology of choice for RF power applications, but that CMOS is a promising low cost technology for low-power RF applications like cellular phones.

According to Gonçal Badenes, manager of CMOS device integration, the planned three-year program will address technology development, design, and modelling in parallel, with particular attention to transistor optimization, characterization, and static discharge protection. Badenes said that three steps are planned: 5-6 GHz devices, 10-12 GHz devices, and 20-25 GHz devices.